Seal ring formation is an important part in the back-end of semiconductor processes. Seal rings are stress protection structures around integrated circuits, protecting the internal circuit inside semiconductor chips from the damage caused by the sawing of the semiconductor chips from wafers. Further, seal rings may prevent moisture from penetrating into the semiconductor chips. Typical seal rings are usually formed of interconnected metal lines and vias, and are formed adjacent to scribe lines, which are sometimes referred to as dicing lines. Integrated circuits are formed on the inner side of the seal rings.
Because of the provision of seal rings and passivation layers, the circuit regions on the inner side of the seal rings are protected from the influence of external environments, which may cause cracking in the semiconductor chips, thus it is possible to ensure stability of properties of the semiconductor device over a long period of time.
When the wafers are sawed, high mechanical stresses may be applied to, and may damage, the seal rings. To increase the strength of the seal rings, corner stress release (CSR) structures may be formed at the corners of the semiconductor chips. The CSR structures are additional metal lines and vias that are formed simultaneously with the formation of seal rings, and physically join the seal rings. With the formation of the CSR structures, more metal structures exist at the corner regions, which typically have greater stresses than other regions of the semiconductor chips. The stresses applied to the seal rings may thus be spread to more metal structures, and hence the respective seal rings are less likely to be damaged by the stresses.